1. Field of the Invention
The invention relates to a method for fabricating MOS transistor, and more particularly, to a method of using rapid thermal process to drive-in platinum from surface of silicide layer into the silicide layer.
2. Description of the Prior Art
Field effect transistors are important electronic devices in the fabrication of integrated circuits, and as the size of the semiconductor device becomes smaller and smaller, the fabrication of the transistors also improves and is constantly enhanced for fabricating transistors with smaller sizes and higher quality.
In the conventional method of fabricating transistors, a gate structure is first formed on a substrate, and a lightly doped drain (LDD) is formed on the two corresponding sides of the gate structure. Next, a spacer is formed on the sidewall of the gate structure and an ion implantation process is performed to form a source/drain region within the substrate by utilizing the gate structure and spacer as a mask. In order to incorporate the gate, source, and drain into the circuit, contact plugs are often utilized for interconnection purposes, in which the contact plugs are composed of conducting metals such as tungsten and copper. Nevertheless, the interconnection between the contact plugs and the silicon material of the gate structure and the source/drain region is usually poor, hence a silicide material is often formed over the surface of the gate structure and the source/drain region to improve the ohmic contact between the contact plugs and the gate structure and the source/drain region.
Today, the process known as self-aligned silicide (salicide) process has been widely utilized to fabricate silicide materials, in which a source/drain region is first formed, a metal layer comprised of cobalt, titanium, or nickel is disposed on the source/drain region and the gate structure, and a first rapid thermal process (RTP) is performed to react the metal layer with the silicon contained within the gate structure and the source/drain region to form a silicide layer. After using a sulfuric acid-hydrogen peroxide mixture (SPM) cleaning to remove un-reactive nickel from the first rapid thermal process, a second RTP is conducted to reduce the sheet resistance of the silicide layer.
Unfortunately, the cleaning process conducted between the aforementioned first and second RTP typically removes un-reacted metal entirely. Even if some metals remained after the cleaning process, they are preferably concentrated relative to the surface of the silicide and could not penetrate into the interface between the silicide and the semiconductor substrate. This causes a junction leakage between the PN junction of the source/drain region and the silicon substrate and the silicide being formed and results in a piping phenomenon. Hence, how to effectively resolve this issue has become an important task.